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PROCEEDINGS OF THE NINTH INTERNATIONAL CONFERENCE ON ENGINEERING COMPUTATIONAL TECHNOLOGY
Edited by: P. Iványi and B.H.V. Topping
OpenMP HEVC Parallel Version based on a GOP Approach
H. Migallón1, J.L. Hernández-Losada2, G. Cebrián-Márquez2, P. Piñol1, J.L. Martínez2, O. López-Granado1 and M.P. Malumbres1
1Department of Physics and Computer Architectures, University Miguel Hernández, Elche, Alicante, Spain
H. Migallón, J.L. Hernández-Losada, G. Cebrián-Márquez, P. Piñol, J.L. Martínez, O. López-Granado, M.P. Malumbres, "OpenMP HEVC Parallel Version based on a GOP Approach", in P. Iványi, B.H.V. Topping, (Editors), "Proceedings of the Ninth International Conference on Engineering Computational Technology", Civil-Comp Press, Stirlingshire, UK, Paper 24, 2014. doi:10.4203/ccp.105.24
Keywords: parallel algorithms, video coding, HEVC, multicore, performance, GOP-based algorithms.
Recently, a new video coding standard called HEVC has been developed to deal with the current media market challenges, being able to reduce by the half, on average, the bit stream size produced by the former video coding standard H.264/AVC at the same video quality. However, the computing requirements to encode video improving compression efficiency have significantly been increased. In this paper, we focus on applying parallel processing techniques to HEVC encoder in order to significantly reduce the computational power requirements without disturbing the coding efficiency. So, we propose several parallelization approaches to the HEVC encoder, tested on multicore platforms but also well suited to distributed memory architectures. Our proposals use OpenMP programming paradigm working at a coarse grain level parallelization which we call the GOP-based level. GOP-based approaches encode simultaneously several groups of consecutive frames. Depending on how these GOPs are conformed and distributed it is critical to obtain good parallel performance, taking also into account the level of coding efficiency degradation. The results show that near ideal efficiencies are obtained using up to 10 cores. The parallel algorithms developed support all standard modes proposed by the reference software.
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